WF_RP5C15_DS1392_SOC Project Status | |||
Project File: | WF_RP5C15_DS1392_SOC.ise | Current State: | Synthesized |
Module Name: | WF5C15_139xIP_TOP |
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No Errors |
Target Device: | xc3s200-5ft256 |
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No Warnings |
Product Version: | ISE 8.2i |
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Fr 5. Jan 16:59:30 2007 |
WF_RP5C15_DS1392_SOC Partition Summary | |||
No partition information was found. |
Device Utilization Summary (estimated values) | |||
Logic Utilization | Used | Available | Utilization |
Number of Slices | 292 | 1920 | 15% |
Number of Slice Flip Flops | 169 | 3840 | 4% |
Number of 4 input LUTs | 541 | 3840 | 14% |
Number of bonded IOBs | 24 | 173 | 13% |
Number of GCLKs | 1 | 8 | 12% |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | Fr 5. Jan 10:18:44 2007 | 0 | 0 | 0 |
Translation Report | |||||
Map Report | |||||
Place and Route Report | |||||
Static Timing Report | |||||
Bitgen Report |
Secondary Reports | ||
Report Name | Status | Generated |
Xplorer Report |