TEST_USART_RX Project Status | |||
Project File: | Test_USART_Rx.ise | Current State: | Synthesized |
Module Name: | WF68901IP_USART_RX |
|
No Errors |
Target Device: | xc3s200-5tq144 |
|
2 Warnings |
Product Version: | ISE 8.2i |
|
Di 7. Nov 07:59:28 2006 |
TEST_USART_RX Partition Summary | |||
No partition information was found. |
Device Utilization Summary (estimated values) | |||
Logic Utilization | Used | Available | Utilization |
Number of Slices | 88 | 1920 | 4% |
Number of Slice Flip Flops | 56 | 3840 | 1% |
Number of 4 input LUTs | 168 | 3840 | 4% |
Number of bonded IOBs | 39 | 97 | 40% |
Number of GCLKs | 1 | 8 | 12% |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | Di 7. Nov 07:59:20 2006 | 0 | 2 Warnings | 6 Infos |
Translation Report | |||||
Map Report | |||||
Place and Route Report | |||||
Static Timing Report | |||||
Bitgen Report |
Secondary Reports | ||
Report Name | Status | Generated |
Xplorer Report |